SPI + DMA channels 4 to 7 completion interrupt issue

makc

Hello, All!

I have an issue with completion interrupts for SPI data exchange if it uses DMA channels from 4 to 7. The same code performs flawlessly when I'm using DMA channels from 0 to 3.
The main symptom is missing completion interrupt after transfer is completed (monitored by counters).

Have you tried to use DMA channels 4 or greater with completion interrupts?

asaki

4 -7 do not suport irq.

makc

Is this restriction documented? I can't find anything in user manual or datasheet.

PS: May be this is BL702 errata and you could provide complete errata list?

asaki

makc Not available yet，i will add warnings in driver later.

makc

asaki
OK, thank you.